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ECE 627Register-transfer-level Digital Systems

Units
0.50
Level
Graduate
Faculty
Engineering
Subject
Electrical and Computer Engineering

ECE 627 as listed in the Winter 2026 Graduate Calendar. The main page has the current version, when it runs, and seats.

Syntax, semantics, and usage of hardware description languages like VHDL, Verilog, etc. Modeling concurrency and using other simulation techniques. Modeling, design, and implementation at the register-transfer level. Functional verification techniques. Timing analysis. Introduction to power analysis and optimization. Introduction to faults and testing.

Prerequisites

None listed.

Antirequisites

None listed.

Leads to

No course lists it as a requisite.

Check it elsewhere for Winter 2026

Calendar versions

Graduate Calendar

Older Graduate Calendars

In 24 terms, Fall 2012 to Winter 2024